Computer graphics processing and selective visual display system – Computer graphics display memory system – Addressing
Reexamination Certificate
2006-03-07
2006-03-07
Tung, Kee M. (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Addressing
C345S557000
Reexamination Certificate
active
07009618
ABSTRACT:
In a computer system, an address range is defined within the memory map. Addresses within the address range are mapped to other addresses within the memory map using an address relocation mechanism (e.g. the GART mechanism). The address range is divided into two portions. A graphics device may use the first portion to address a contiguous address space, and the addresses are remapped to other address using the address relocation mechanism. Particularly, the contiguous address space used by the graphics device may be remapped to non-contiguous pages elsewhere in the memory map. Other peripheral devices may use the second portion when performing data transfers to portions of the memory map above a predefined limit. The predefined limit may be the highest memory location in the memory map for which the peripheral device is capable of directly generating the address (e.g. 4 GB for a 32 bit address).
REFERENCES:
patent: 5506953 (1996-04-01), Dao
patent: 5872998 (1999-02-01), Chee
patent: 6097402 (2000-08-01), Case et al.
patent: 6195734 (2001-02-01), Porterfield
patent: 6249853 (2001-06-01), Porterfield
patent: 6252612 (2001-06-01), Jeddeloh
patent: 6457068 (2002-09-01), Nayyar et al.
patent: 6469703 (2002-10-01), Aleksic et al.
patent: 6525739 (2003-02-01), Gurumoorthy et al.
patent: 6665788 (2003-12-01), Hughes
patent: 6715053 (2004-03-01), Grigor
patent: 6886090 (2005-04-01), Campbell
Intel, “Draft AGP V3.0Interface Specification,” Revisional 0.95, May 2001, pp. 104-108.
Intel, “Technology Overview: Technology Graphics Port Technology,” 2002, 9 pages.
Brunner Richard A.
Hughes William Alexander
Advanced Micro Devices , Inc.
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Tung Kee M.
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