Integrated electronic memory circuit with internal timing and op

Details Integrated electronic memory circuit with internal timing and op Integrated electronic memory circuit with internal timing and op

1986-05-07

1989-04-25

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Signals

365233, 365189, 365230, G11C 700, G11C 800

Patent

active

048254169

ABSTRACT:
An integrated electronic memory circuit is provided which includes memory circuitry for storing binary data in an array of memory locations; first data signal providing circuitry for providing input data signals to the memory circuitry, for storage by the memory circuitry as binary data at respective memory locations; and write signal generator circuitry for generating a write signal causing the memory circuitry to accept input data signals from the first data signal providing circuitry for storing in the array.

REFERENCES:
patent: 4513372 (1985-04-01), Ziegler et al.
patent: 4608669 (1986-08-01), Klara et al.
patent: 4656612 (1987-04-01), Allan
patent: 4685088 (1987-08-01), Iannucci
IBM Tech. Discl. Bull., vol. 9, No. 10, Mar., '67, p. 1328, "Memory Clock Design" by Hultman.

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