Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2002-06-06
2009-10-06
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S701000
Reexamination Certificate
active
07600175
ABSTRACT:
In an integrated digital circuit, at least one derived data signal is generated from a data signal that is to be transmitted via a line of the digital circuit, by inverting at least two bits of the data signal. The circuit is also provided with an evaluation unit for evaluating the susceptibility of the data signal and the derived data signal, or of derived data signals to interference caused by a capacitive coupling of the line to at least one neighboring line.
REFERENCES:
patent: 3649915 (1972-03-01), Mildonian, Jr.
patent: 4276649 (1981-06-01), Groenendaal et al.
patent: 4945549 (1990-07-01), Simon et al.
patent: 5251214 (1993-10-01), Mertens et al.
patent: 6067646 (2000-05-01), Starr
patent: 6182264 (2001-01-01), Ott
patent: 6209055 (2001-03-01), Durham et al.
patent: 6280794 (2001-08-01), Tu et al.
patent: 6396393 (2002-05-01), Yuasa
patent: 6438717 (2002-08-01), Butler et al.
patent: 6816987 (2004-11-01), Olson et al.
patent: 6985510 (2006-01-01), Willenegger
patent: 0978875 (2000-02-01), None
Grams, T., “Codierungsverfahren [Coding Methods],” B1 Hochschultaschenbücher, 625, 1986, S. 64 ff.
Kawaguchi, T., et al., “A Reduced Clock-Swing Flip-Flop (RCSFF) for 63% Power Reduction,” IEEE Journal of Solid-State Circuits, vol. 33, No. 5, pp. 807-811, May 1998.
Kahng, A.B., et al., “Interconnect Tuning Strategies for High-Performance IC's,” Proc. Design, Automation and Testing in Europe, Paris, Feb. 1998.
Favalli, M., et al., “Optimization of Error Detecting Codes for the Detection of Crosstalk Originated Errors,” IEEE Proceedings, pp. 290-296, 2001.
Victor, B., “Data Encoding to Prevent Crosstalk Delay,” http://www.cad.eecs.berkeley.edu/˜niraj/ee244/projects/victor.ppt>, pp. 1-64, Feb. 27, 2001.
Concise explanation of Non-English reference, “Codierungsverfahren.”
Kawaguchi et al., Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines, IEEE Proceedings of Design Automation Conference, Feb. 10-13, 1998, pp. 35-43.
Britt Cynthia
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
Nguyen Steve
LandOfFree
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