Integrated DDC memory with bitwise erase

Details Integrated DDC memory with bitwise erase Integrated DDC memory with bitwise erase

1977-06-08

1978-12-19

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Semiconductive

307238, G11C 1140

Patent

active

041308905

ABSTRACT:
This relates to a monolithic dual-dielectric cell (DDC) memory array with a DDCFET matrix. The substrate zones of these DDCFETs are inserted into a substrate body having islands for decoder logic and potential selection integrated MISFET circuits. These circuits provide potentials to bitwise write, erase or read the matrix.

REFERENCES:
patent: 3618051 (1971-11-01), Oleksiak
patent: 3733591 (1973-05-01), Cricchi
patent: 3971001 (1976-07-01), Lodi

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