Coating processes – Electrical product produced – Metal coating
Patent
1997-04-11
2000-10-31
Dudash, Diana
Coating processes
Electrical product produced
Metal coating
4271261, 4272557, B05D 512
Patent
active
061399051
ABSTRACT:
The present invention provides a method and apparatus for forming an interconnect with application in small feature sizes (such as quarter micron widths) having high aspect ratios. Generally, the present invention provides a method and apparatus for depositing a wetting layer for subsequent physical vapor deposition to fill the interconnect. In one aspect of the invention, the wetting layer is a metal layer deposited using either CVD techniques or electroplating, such as CVD aluminum (Al). The wetting layer is nucleated using an ultra-thin layer, denoted as .di-elect cons. layer, as a nucleation layer. The .di-elect cons. layer is preferably comprised of a material such as Ti, TiN, Al, Ti/TiN, Ta, TaN, Cu, a flush of TDMAT or the like. The .di-elect cons. layer may be deposited using PVD or CVD techniques, preferably PVD techniques to improve film quality and orientation within the feature. Contrary to conventional wisdom, the .di-elect cons. layer is not continuous to nucleate the growth of the CVD wetting layer thereon. A PVD deposited metal is then deposited on the wetting layer at low temperature to fill the interconnect.
REFERENCES:
patent: 4784973 (1988-11-01), Stevens et al.
patent: 5032233 (1991-07-01), Yu et al.
patent: 5080933 (1992-01-01), Grupen et al.
patent: 5091339 (1992-02-01), Carey
patent: 5147819 (1992-09-01), Yu et al.
patent: 5240739 (1993-08-01), Doan et al.
patent: 5292558 (1994-03-01), Heller et al.
patent: 5308796 (1994-05-01), Feldman et al.
patent: 5312774 (1994-05-01), Nakamura et al.
patent: 5354712 (1994-10-01), Ho et al.
patent: 5420072 (1995-05-01), Fiordalice et al.
patent: 5429991 (1995-07-01), Iwasaki et al.
patent: 5480836 (1996-01-01), Harada et al.
patent: 5514425 (1996-05-01), Ito et al.
patent: 5523259 (1996-06-01), Merchant et al.
patent: 5565819 (1996-10-01), Ohsaki et al.
patent: 5582881 (1996-12-01), Besser et al.
patent: 5585308 (1996-12-01), Sardella
patent: 5585673 (1996-12-01), Joshi et al.
patent: 5627102 (1997-05-01), Shinriki et al.
patent: 5654232 (1997-08-01), Gardner
patent: 5712193 (1998-01-01), Hower et al.
patent: 5804251 (1998-09-01), Yu et al.
patent: 5858873 (1999-01-01), Vitkavage et al.
European Search Report dated May 27, 1999.
Yosi Shacham-Diamand, "100nm Wide Copper Lines Made by Selective Electroless Deposition," J. Micromech. Microeng, Mar. 1, 1991, vol. 1. No. 1, pp. 66-72.
Li, et al., "Copper Deposition and Thermal Stability Issues in Copper-Based Metalization for ULSI Technology," Materials Science Reports, 1992, Vol. 9, pp. 1-51.
K. Mikagi, H. Ishikawa, T. Usami, M. Suzuki, K. Inoue, N. Oda, S. Chikaki, I. Sakai and T. Kikkawa, "Barrier Metal Free Copper Damascene Interconnection Technology Using Atmospheric Copper Reflow and Nitrogen Doping in SiOF Film," 1996 IEEE, pp. 365-368.
Y. Shacham-Diamand, V. Dubin and M. Angyal, "Electroless Copper Deposition for ULSI," 1995 Elsevier Science S.A., pp. 93-103.
Chen Liang-Yuh
Guo Ted
Mosely Roderick Craig
Naik Mehul
Applied Materials Inc.
Dudash Diana
Strain Paul D.
LandOfFree
Integrated CVD/PVD Al planarization using ultra-thin nucleation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated CVD/PVD Al planarization using ultra-thin nucleation , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated CVD/PVD Al planarization using ultra-thin nucleation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2048397