Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate
2006-08-01
2006-08-01
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Having details of setting or programming of interconnections...
C326S039000, C370S902000, C370S902000, C370S314000, C370S341000
Reexamination Certificate
active
07084664
ABSTRACT:
Integrated circuits are provided that use on-chip data compression and decompression to minimize consumption of interconnect resources. Parallel-to-serial converter circuitry can use time-division multiplexing techniques to compress data. The compressed data may be conveyed between circuit blocks on the integrated circuit using a reduced number of parallel interconnect conductors. After the compressed data has been conveyed to its destination, a serial-to-parallel converter may use time-division demultiplexing techniques to decompress the data. Interconnect resources may be shared by dedicated circuits. With this arrangement, signals can be selectively steered through the appropriate dedicated circuitry to either maximize performance or to use compression and decompression to minimize interconnect resource consumption.
REFERENCES:
patent: 5583450 (1996-12-01), Trimberger et al.
patent: 5594367 (1997-01-01), Trimberger et al.
patent: 5600263 (1997-02-01), Trimberger et al.
patent: 5629637 (1997-05-01), Trimberger et al.
patent: 5646545 (1997-07-01), Trimberger et al.
patent: 5701441 (1997-12-01), Trimberger
patent: 5740404 (1998-04-01), Baji
patent: 5761483 (1998-06-01), Trimberger
patent: 5825662 (1998-10-01), Trimberger
patent: 5838954 (1998-11-01), Trimberger
patent: 5978260 (1999-11-01), Trimberger et al.
patent: 5986467 (1999-11-01), Trimberger
patent: 6263430 (2001-07-01), Trimberger et al.
patent: 6272130 (2001-08-01), Panahi et al.
patent: 6307658 (2001-10-01), Chiaroni et al.
patent: 6480954 (2002-11-01), Trimberger et al.
patent: 6501296 (2002-12-01), Wittig et al.
patent: 6684275 (2004-01-01), Goldstein
Burney Ali H.
Langhammer Martin
Lee Kwan Yee
Alter Corporation
Barnie Rexford
Crawford Jason
Treyz G. Victor
LandOfFree
Integrated circuits with reduced interconnect overhead does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuits with reduced interconnect overhead, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuits with reduced interconnect overhead will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3641549