Integrated circuits with copper metallization for interconnectio

Details Integrated circuits with copper metallization for interconnectio Integrated circuits with copper metallization for interconnectio

1999-05-19

2000-11-14

Gorgos, Kathryn

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Forming nonelectrolytic coating before depositing...

205157, 205123, 4272557, 42725536, 427255391, 438653, 438656, 438687, C23C 2802

Patent

active

061465178

ABSTRACT:
An improved fill of high aspect ratio trenches by copper is obtained by first sputtering a thin nucleating film of copper deposited by physical vapor deposition, then depositing a thin seed layer of copper by chemical vapor deposition, and then completing the fill by electroplating. Stress migration of the fill is improved if the copper deposition is preceded by the deposition by CVD of a layer of titanium nitride either alone or preceded and/or followed by the deposition of tantalum by an ionized PVD source.

REFERENCES:
patent: 5933758 (1999-08-01), Jain
patent: 6015749 (2000-01-01), Liu et al.
patent: 6037258 (2000-03-01), Liu et al.
patent: 6043149 (2000-03-01), Jun
patent: 6048790 (2000-04-01), Iacoponi et al.
patent: 6054378 (2000-04-01), Sakala et al.
patent: 6069068 (2000-05-01), Rathore et al.
patent: 6077780 (2000-06-01), Dubin

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