Integrated circuits including voltage-controllable power...

Details Integrated circuits including voltage-controllable power... Integrated circuits including voltage-controllable power...

1999-09-20

2002-03-19

Metjahic, Safet (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB

Reexamination Certificate

active

06359459

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATION
This application claims the benefit of Korean Patent Application No. 98 -39957, filed Sep. 25, 1998, the disclosure of which is hereby incorporated herein by reference.
FIELD OF THE INVENTION
The present invention relates generally to the field of power supplies, and, more particularly, to power supply systems and methods for performing low supply voltage margin tests.
BACKGROUND OF THE INVENTION
As the functionality of integrated circuit devices continues to increase and diversify, the number and type of test conditions and scenarios may also increase. For example, two such tests that may be used to verify the operability of integrated circuit devices are the high supply voltage margin test and the low supply voltage margin test. An integrated circuit device may be given a rating that identifies the maximum and minimum voltages that can be used to power the device while still maintaining normal operation. In a high supply voltage margin test, the maximum power supply voltage is applied to verify that the integrated circuit device can still operate normally. Likewise, in a low supply voltage margin test, the minimum power supply voltage is applied to verify that the integrated circuit device can still operate normally. The low supply voltage margin test is discussed hereafter in more detail.
In general, an integrated circuit device receives an external supply voltage and generates an internal supply voltage therefrom such that the internal supply voltage has a lower magnitude than the external supply voltage.
FIG. 1
illustrates a low supply voltage margin test for a conventional integrated circuit device in which the internal supply voltage VINT has a clamp level of 3.0V. A low supply voltage margin test is generally performed at a voltage level having a lower magnitude than the magnitude of the internal supply voltage. Thus, to perform a low supply voltage margin test, the external supply voltage VEXT is lowered until it falls below the clamp level of 3.0V. The external supply voltage VEXT and internal supply voltage VINT track one another below the clamp level of 3.0V as shown in the
FIG. 1
graph. In the
FIG. 1
example, the low supply voltage margin test is performed at a voltage V
1
of 2.8V.
The external supply voltage VEXT may also be used to generate additional internal supply voltages to power other components in the integrated circuit device or to power other components directly. For example, a semiconductor memory device may use the external supply voltage VEXT to generate a first internal supply voltage for a memory cell array and a second internal supply voltage for peripheral circuitry. Accordingly, when the external supply voltage VEXT is lowered to perform the low supply voltage margin test for the memory cell array, the second internal supply voltage for the peripheral circuitry may also be affected.
Returning to the
FIG. 1
example, the internal supply voltage VINT has a clamp level of 3.0V and the low supply voltage margin test is performed at a relatively high voltage level of 2.8V. In this example, the external supply voltage VEXT may be of sufficient magnitude (i.e., 2.8V) to be used for generating other internal supply voltages or directly powering other components.
With reference to
FIG. 2
, a low supply voltage margin test is illustrated for a conventional integrated circuit device in which the internal supply voltage VINT has a clamp level of 2.5V. Similar to the
FIG. 1
example, to perform a low supply voltage margin test, the external supply voltage VEXT is lowered until it falls below the clamp level of 2.5V. The external supply voltage VEXT and internal supply voltage VINT track one another below the clamp level of 2.5V as shown in the
FIG. 2
graph. In the
FIG. 2
example, the low supply voltage margin test is performed at a voltage V
2
of 2.3V. This reduced level of 2.3V, however, may not be sufficient to reliably power other devices or components not undergoing the low supply voltage margin test.
Consequently, there exists a need for improved power supply systems and methods that can be used for low supply voltage margin testing while reducing the effect of the testing on other components, systems, or devices that are not test subjects.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved power supply systems and methods that can be used for low supply voltage margin testing.
It is another object of the present invention to provide improved power supply systems and methods that can reduce the effect of low supply voltage margin testing on other components, systems, or devices that are not test subjects.
These and other objects, advantages, and features of the present invention may be provided by integrated circuits and methods that use a margin test voltage generator that is powered at a first power supply voltage to generate a second power supply voltage that has a magnitude that is less than the magnitude of the first power supply voltage. During a low supply voltage margin test, a first logic circuit is powered at the first power supply voltage while a second logic circuit, which is the subject of the test, is powered at the second power supply voltage. As a result, the first power supply voltage may remain at a sufficient magnitude to reliably power other devices or components that are not undergoing the low supply voltage margin test.
In accordance with an aspect of the invention, the margin test voltage generator comprises a reference voltage generation unit, which is responsive to a control signal having a plurality of states, to generate a first reference voltage that has a magnitude corresponding to the state of the control signal. The control signal can be used to generate the second power supply voltage at a magnitude that can be used to perform a low supply voltage margin test without the need to reduce the first power supply voltage to the same test magnitude.
In accordance with another aspect of the invention, a scaling unit, which is responsive to the first reference voltage, generates a second reference voltage. The scaling unit may be used to improve the accuracy of the magnitude of the first reference voltage by allowing the reference voltage generation unit to generate the first reference voltage at a relatively low magnitude. The scaling unit can then be used to generate a second reference voltage, which is a scaled or amplified representation of the first reference voltage. In a preferred embodiment, the scaling unit comprises a controller circuit and a differential amplifier circuit.
In accordance with still another aspect of the invention, a supply voltage generation unit, which is responsive to the second reference voltage, generates the second power supply voltage such that the second power supply voltage and the second reference voltage have approximately the same magnitude. In a preferred embodiment, the supply voltage generation unit comprises a comparator circuit and a driver circuit.
Power supply systems and methods according to the present invention can therefore be used to perform a low supply voltage margin test while maintaining a potential difference between, for example, an external supply voltage and an internal supply voltage. Advantageously, the impact on other systems, components, or devices that may directly or indirectly rely upon the external supply voltage can be reduced.


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Horiguchi et al., “1990 Symposium on VLSI Circuits, Digest of Technical Papers,” 1990 , pp. 75-76.
Horiguchi et al., “1990 Symposium on VLSI

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