Integrated circuits including power supply boosters and methods

Details Integrated circuits including power supply boosters and methods Integrated circuits including power supply boosters and methods

1996-05-16

1998-05-19

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327537, 363 60, G05F 110

Patent

active

057540756

ABSTRACT:
An integrated circuit provides a power supply voltage, a first boosted voltage, and a second boosted voltage which is preferably equal to or greater than the first boosted voltage, to the integrated circuit transistors, such that the integrated circuit transistors operate using the power supply voltage, the first boosted voltage and the second boosted voltage. The integrated circuit includes a first boosting circuit which boosts the power supply voltage to a first boosted voltage and a second boosting circuit which boosts the power supply voltage to a second boosted voltage. The first boosting circuit is preferably responsive to application of the power supply voltage to the integrated circuit and the second boosting circuit is preferably responsive to application of the power supply voltage to the integrated circuit and to an enable signal. Preferably, the first boosting circuit applies the first boosted voltage to the bulk region of selected PMOS transistors in the integrated circuit and the second boosting circuit applies the second boosting voltage to the source regions of selected PMOS transistors. In one embodiment, the first and second boosted voltages are applied to the word line driver of an integrated circuit memory device such that the second boosted voltage is applied to the source of the word line driver PMOS transistors in response to a row address strobe signal. High speed operations are thereby provided with reduced susceptibility to bridging defect errors.

REFERENCES:
patent: 5448198 (1995-09-01), Toyoshima et al.
patent: 5535160 (1996-07-01), Yamaguchi et al.
patent: 5610533 (1997-03-01), Arimoto et al.

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