Integrated circuits having stepped dielectric regions

Details Integrated circuits having stepped dielectric regions Integrated circuits having stepped dielectric regions

1986-09-04

1987-06-30

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156651, 156653, 156657, 1566591, 430317, B44C 122, C03C 1500, C03C 2506

Patent

active

046768696

ABSTRACT:
Deposited silicon dioxide may be used as a field oxide layer or for other dielectric purposes in integrated circuits. However, etching a pattern in the layer usually produces steep sidewalls that prevent good step coverage of subsequently deposited conductor layers. The present technique forms the dielectric in at least two layers having different densities. A sequence of anisotropic and isotropic etching results in stepped sidewalls, providing good linewidth control and good step coverage of subsequently deposited material.

REFERENCES:
patent: 3880684 (1975-04-01), Abe
patent: 4181564 (1980-01-01), Fogarty et al.
patent: 4372034 (1983-02-01), Bohr
patent: 4461672 (1984-07-01), Musser
patent: 4484978 (1984-11-01), Keyser
patent: 4484979 (1984-11-01), Stocker
patent: 4505026 (1985-03-01), Bohr et al.
patent: 4543707 (1985-10-01), Ito et al.
patent: 4631248 (1986-12-01), Pasch
Bilayer Taper Etching of Field Oxides and Passivation Layers, Lawrence Keith White, Electrostriction, vol. 127, No. 12, pp. 2687-2693.

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