Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-04-18
2006-04-18
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07032190
ABSTRACT:
A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.
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Tsu-Wei Ku, “Using ‘empty space’ for IC congestion relief”, EEdesign, Jun. 19, 2003, pp. 1-7.
Auracher Stefan
Hils Andreas
Pribbernow Claus
LSI Logic Corporation
Maiorana P.C. Christopher P.
Siek Vuthe
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