Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2000-09-12
2002-06-25
Everhart, Caridad (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
C257S698000, C257S700000
Reexamination Certificate
active
06410976
ABSTRACT:
TECHNICAL FIELD
This invention relates to integrated circuitry and methods of forming integrated circuitry.
BACKGROUND OF THE INVENTION
As integrated circuitry dimensions shrink, a continuing challenge in the semiconductor industry is to find new, innovative, and efficient ways of forming electrical connections with and between circuit devices which are fabricated on the same and on different wafers or dies. Relatedly, continuing challenges are posed to find and/or improve upon the packaging techniques utilized to package integrated circuitry devices.
This invention arose out of concerns associated with improving the manner in which electrical connections or interconnections are formed relative to integrated circuitry devices.
SUMMARY OF THE INVENTION
Integrated circuitry and methods of forming integrated circuitry are described. In one aspect, a hole is formed in a semiconductor wafer. In a preferred implementation, the hole extends through the entire wafer. Subsequently, conductive material is formed within the hole and interconnects with integrated circuitry which is formed proximate at least one of a front and back wafer surface. According to one aspect of the invention, integrated circuitry is formed proximate both front and back surfaces. In a preferred implementation, a plurality of holes are formed through the wafer prior to formation of the integrated circuitry.
In accordance with a preferred implementation, formation of the conductive material within the hole takes place through formation of a first material within the hole. A second material is formed over the first material, with at least the second material being electrically conductive. The wafer is exposed to conditions which are effective to cause the second material to replace the first material. In another preferred implementation, the hole has an interior surface and prior to formation of the conductive material therein, a dielectric layer is formed within the hole proximate the interior surface.
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Everhart Caridad
Micro)n Technology, Inc.
Wells St. John P.S.
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