Integrated circuit with simultaneous fabrication of dual...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S624000, C438S625000, C438S627000, C438S687000

Reexamination Certificate

active

06995087

ABSTRACT:
An integrated circuit manufacturing method includes providing a base, forming a first conductor, forming a first barrier layer, forming a first dielectric layer, and forming a masking layer. The method further including forming a first via opening in the masking layer, forming a first trench opening in the masking layer, and simultaneously forming a second via opening in a layer under the masking layer, and forming a second trench opening through the masking layer and in the layer under the masking layer and simultaneously forming a third via opening in another layer under the masking layer. The method further including removing the first barrier layer using the third via opening and the masking layer to form a trench and a via, and filling the trench and the via with a conductor to form a trench and via conductor in contact with the first conductor.

REFERENCES:
patent: 5856225 (1999-01-01), Lee et al.
patent: 2002/0187629 (2002-12-01), Huang et al.

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