Integrated circuit with reduced body effect sensitivity

Details Integrated circuit with reduced body effect sensitivity Integrated circuit with reduced body effect sensitivity

2006-01-31

2006-01-31

Phan, Trong (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189080, C365S201000

Reexamination Certificate

active

06992917

ABSTRACT:
An integrated circuit (IC), random access memory on an IC and method of neutralizing device floating body effects. A floating body effect monitor monitors circuit/array activity and selectively provides an indication of floating body effect manifestation from inactivity, including the lapse of time since the most recent activity or memory access. A pulse generator generates a neutralization pulse in response to an indication of inactivity. A neutralization pulse distribution circuit passes the neutralization pulse to blocks in the circuit path or to array cells.

REFERENCES:
patent: 4943960 (1990-07-01), Komatsu et al.
patent: 5604707 (1997-02-01), Kuge et al.
patent: 5646900 (1997-07-01), Tsukude et al.
patent: 5654913 (1997-08-01), Fukushima et al.
patent: 6078058 (2000-06-01), Hsu et al.
patent: 6549450 (2003-04-01), Hsu et al.
patent: 6608785 (2003-08-01), Chuang et al.
patent: 6856545 (2005-02-01), Ogura et al.

Affiliated with

Also associated with

Rating

Integrated circuit with reduced body effect sensitivity does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit with reduced body effect sensitivity, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit with reduced body effect sensitivity will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3560486