Integrated circuit with metal features presenting a larger landi

Details Integrated circuit with metal features presenting a larger landi Integrated circuit with metal features presenting a larger landi

1997-12-18

2000-09-05

Monin, Jr., Donald L.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257775, 438622, H01L 2348, H01L 2352, H01L 2940

Patent

active

061147664

ABSTRACT:
A metal feature, defined by gaps in a patterned metal layer, is formed with an inwardly tapering profile so that it is wider at the top than at the bottom. The metal feature advantageously presents a larger landing area for vias while maintaining the dimensions and intraline coupling capacitance requited by design. The gaps in the patterned metal layer can be filled with a spin-on dielectric material such as spin-on glass (SOG) or hydrogen silsesquioxane (HSQ).

REFERENCES:
patent: 5506177 (1996-04-01), Kishimoto et al.
patent: 5763954 (1999-06-01), Hyakutake
patent: 5895937 (1999-04-01), Su et al.
Amazawa, A. et al., "A 0.25 .mu.m Via Plug Process using Selective CVD Aluminum for Multilevel Interconnection", IEDM 91, pp. 265-268, Sep. 1991.

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