Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2011-01-18
2011-01-18
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Read/write circuit
Testing
C365S233100
Reexamination Certificate
active
07872931
ABSTRACT:
An integrated circuit includes an array of memory cells, a clock generator configured to generate a clock signal, and a control circuit configured to perform a retention test on the array of memory cells based on the clock signal. A period of the clock signal defines a retention period for the retention test.
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Dicke Billig & Czaja, PLLC
Pham Ly D
Qimonda North America Corp.
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