Integrated circuit with bonding layer over active circuitry

Details Integrated circuit with bonding layer over active circuitry Integrated circuit with bonding layer over active circuitry

1997-10-28

2000-11-07

Picard, Leo P.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257766, 257768, H01L 2348, H01L 2352

Patent

active

061441007

ABSTRACT:
An integrated circuit device (10) with a bonding surface (12) directly over its active circuitry, and a method of making such integrated circuits (FIGS. 2A 2E). To make the bonding surface (12), a wafer (20) is provided with vias (24) to its metallization layer (21) and then coated with a seed metal layer (25). A plating pattern (26) is formed on the wafer (20), exposing portions of the seed metal layer (25) and blocking the rest of the seed metal layer (25). These exposed portions are plated with successive metal layers (27, 28, 29), thereby forming a bonding surface (12) having a number of layered stacks (200) that fill the vias (24). The plating pattern and the nonplated portions of the seed metal layer (25) are then removed.

REFERENCES:
patent: 5182420 (1993-01-01), Steitz et al.
patent: 5367195 (1994-11-01), Digiacomo et al.
patent: 5369220 (1994-11-01), Harada et al.
patent: 5734200 (1998-03-01), Hsue et al.

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