Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1994-09-14
1997-07-15
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257208, 257620, 257665, H01L 2358, H01L 2710, H01L 23528
Patent
active
056486618
ABSTRACT:
Unsingulated dies on a wafer may be individually electronically selected using various "electronic mechanisms" on the wafer. Conductive lines extend on the wafer from the electronic mechanism to the individual dies. The conductive lines may be provided in sets of two or more, such as for providing discrete power and ground connections from the external equipment to the individual dies. Redundant conductive lines may be provided to ensure against "open" faults. Diode and/or fuses may also be provided in conjunction with the conductive lines to ensure against leakages and shorts. Redundant electronic selection mechanisms may also be provided.
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"Dynamic Burn-In Of Integrated Circuit Chips At The Wafer Level", IBM Technical Disclosure Bulletin, vol. 29, No. 6, Nov. 1986.
Dangelo Carlos
Fulcher Edwin
Koford James
Rostoker Michael D.
Hardy David B.
LSI Logic Corporation
Thomas Tom
LandOfFree
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