Integrated circuit two-cycle test mode activation circuit

Static information storage and retrieval – Read/write circuit – Testing

Patent

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Details

36518905, 371 211, G11C 700, G11C 2900

Patent

active

052455777

ABSTRACT:
In an integrated circuit memory chip an improved test mode activation circuit that utilizes a two-cycle voltage level input in conjunction with a first and second voltage pulse. The first and second voltage level inputs are different from the normal power supply voltage level and are compared with each other to see that a significant voltage transition has occurred and, if so, then a test mode output signal is initiated.

REFERENCES:
patent: 4860259 (1989-08-01), Tobita

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