Integrated circuit test using clock signal modification

Details Integrated circuit test using clock signal modification Integrated circuit test using clock signal modification

2003-07-07

2008-12-02

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Skew detection correction

C714S731000, C714S744000

Reexamination Certificate

active

07461304

ABSTRACT:
An apparatus, method, and computer program for testing an integrated circuit comprising a plurality of clocked storage elements each having a clock input, wherein the clocked storage elements are interconnected by a plurality of signal paths, the apparatus comprising a control circuit adapted to provide a control signal; and a signal generator adapted to receive a first clock signal comprising k pulses each having a first duration, change the duration of each of m of the pulses to a second duration in response to the control signal, wherein m<k and the second duration is not substantially equal to the first duration, to produce a second clock signal, and apply the second clock signal to the clock inputs of the plurality of clocked storage elements.

REFERENCES:
patent: 4893072 (1990-01-01), Matsumoto
patent: 5053698 (1991-10-01), Ueda
patent: 5099196 (1992-03-01), Longwell et al.
patent: 5325369 (1994-06-01), Kim
patent: 5455931 (1995-10-01), Camporese et al.
patent: 5489864 (1996-02-01), Ashuri
patent: 5497263 (1996-03-01), Masuda et al.
patent: 5652530 (1997-07-01), Ashuri
patent: 5705942 (1998-01-01), Ashuri
patent: 5761097 (1998-06-01), Palermo
patent: 5936867 (1999-08-01), Ashuri
patent: 6059836 (2000-05-01), Liguori
patent: 6071003 (2000-06-01), Ashuri et al.
patent: 6204694 (2001-03-01), Sunter et al.
patent: 6266749 (2001-07-01), Hashimoto et al.
patent: 6463570 (2002-10-01), Dunn et al.
patent: 6473725 (2002-10-01), Schoellkopf et al.

Affiliated with

Also associated with

Rating

Integrated circuit test using clock signal modification does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit test using clock signal modification, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit test using clock signal modification will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4039041