Integrated circuit system employing stress memorization...

Details Integrated circuit system employing stress memorization... Integrated circuit system employing stress memorization...

2011-06-21

2011-06-21

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

With lattice constant mismatch

C257S369000, C257S371000, C257SE21630

Reexamination Certificate

active

07964894

ABSTRACT:
An integrated circuit system that includes: a substrate including a source/drain region defined by a spacer; a gate over the substrate; a gate dielectric between the gate and the substrate; a recrystallized region within the gate and the source/drain region; and a channel exhibiting the characteristics of stress memorization.

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