Integrated circuit system employing grain size enlargement

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S766000, C438S197000, C438S199000, C257SE21632

Reexamination Certificate

active

07833888

ABSTRACT:
An integrated circuit system that includes: providing a substrate including an active device with a gate top surface exposed; implanting a do pant within the gate to alter the grain size of the gate material; forming a dielectric layer over the active device and the substrate; and annealing the integrated circuit system to transfer the stress of the dielectric layer into the active device.

REFERENCES:
patent: 7101743 (2006-09-01), Li et al.
patent: 2002/0070388 (2002-06-01), Greenberg et al.
patent: 2006/0270217 (2006-11-01), Balseanu et al.
patent: 2007/0099370 (2007-05-01), Nakajima et al.
patent: 2008/0026572 (2008-01-01), Wirbeleit et al.
patent: 2009/0032877 (2009-02-01), Visokay et al.

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