Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-10-17
2009-12-22
Garber, Charles D (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
Reexamination Certificate
active
07635641
ABSTRACT:
A method of fabricating an electronic substrate comprising the steps of; (A) selecting a first base layer; (B) depositing a first etchant resistant barrier layer onto the first base layer; (C) building up a first half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers; (D) applying a second base layer onto the first half stack; (F) applying a protective coating of photoresist to the second base layer; (F) etching away the first base layer; (G) removing the protective coating of photoresist; (H) removing the first etchant resistant barrier layer; (I) building up a second half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers, wherein the second half stack has a substantially symmetrical lay up to the first half stack; (J) applying an insulating layer onto the second hall stack of alternating conductive layers and insulating layers, (K) removing the second base layer, and (L) terminating the substrate by exposing ends of vias on outer surfaces of the stack and applying terminations thereto.
REFERENCES:
patent: 2004/0021222 (2004-02-01), Mori
patent: 2004/0227227 (2004-11-01), Imanaka et al.
patent: 2005/0100720 (2005-05-01), Shirai et al.
Farkash Mardechay
Hurwitz Dror
Igner Eva
Michaeli Benny
Statnikov Boris
Amitec-Advanced Multilayer Interconnect Technologies Ltd.
Dennison, Schultz & MacDonald
Garber Charles D
Stevenson André C
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