Integrated circuit random access memory capable of automatic...

Details Integrated circuit random access memory capable of automatic... Integrated circuit random access memory capable of automatic...

2005-03-22

2005-03-22

Nguyen, Than (Department: 2184)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S105000, C711S155000, C711S158000, C711S159000, C711S167000, C711S168000, C365S233100, C365S189011

Reexamination Certificate

active

06871261

ABSTRACT:
A dynamic random access memory integrated circuit and method includes internal refresh control and an array configured to receive read and write access requests having priority over pending refresh requests, wherein refresh requests are queueable and retired on clock cycles not requiring an access of the array and complete in one clock cycle. No onboard cache memory is required. A method includes: determining within the circuit when one of the banks of the array requires a refresh, prioritizing read and write access requests over pending refresh requests, read access requests initiating an access to the array without determining whether data is available from outside the array, and retiring within a clock cycle one pending refresh request to a bank when that bank has pending refresh requests and does not also require an access of the array on that clock cycle.

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