Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate
2002-12-20
2004-03-23
Clark, Jasmine (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With provision for cooling the housing or its contents
C257S181000, C257S508000, C257S587000, C257S675000, C257S701000
Reexamination Certificate
active
06710443
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to integrated circuits, and more particularly to an integrated circuit providing thermally conductive structures substantially horizontally coupled to one another within one or more heat dissipation layers to dissipate heat from a heat generating structure.
BACKGROUND OF THE INVENTION
During fabrication of an integrated circuit, isolated dummy metal structures may be inserted in the dielectric region of the integrated circuit interconnect layer to increase the density of metal structures on the top surface of the integrated circuit. For example, insertion of dummy metal structures may lead to improved pattern consistency of metal leads and to reduced “dishing” during chemical mechanical polishing (CMP) of the integrated circuit. Furthermore, when the integrated circuit is operational, heat generating structures such as metal leads may cause temperature increases internal to the integrated circuit due to Joule heating effects. Such temperature increases may accelerate wearout mechanisms such as electromigration and stress migration, possibly leading to failure of the integrated circuit. Current trends in integrated circuit design include using dielectric materials of increasingly low thermal conductivity, exacerbating the deleterious effects of Joule heating within the integrated circuit. Another trend is toward increasing the number of metal layers within the dielectric region, placing some metal layers further from a heat sinking interface such as the interface between the dielectric region and the underlying silicon or other integrated circuit substrate. In addition, as integrated circuit layout densities continue to escalate, it becomes increasingly difficult to dissipate heat from metal leads or other heat generating structures. Furthermore, integrated circuits that draw relatively large amounts of power may intensify the increases in temperature in the integrated circuit due to Joule heating effects.
The physics of heat flow in this case teaches that the temperature increase of a heat generating metal lead above the temperature of the substrate is proportional to: (1) heat generated inside the metal lead due to Joule heating caused by electrical current flowing through an electrical resistance, and (2) thermal resistance associated with typically three-dimensional heat, flow away from the heat generating metal lead and into the heat sinking substrate. As discussed previously, it is common practice to intersperse isolated islands of dummy metal throughout the dielectric region of the integrated circuit interconnect layer where electrically active metal leads are absent in the design. To decrease Joule heating effects, it may be desirable to dissipate heat from metal leads or other heat generating structures using dummy metal structures strategically inserted in the dielectric region of the integrated circuit interconnect layer. It may also be desirable to vertically connect these isolated islands of dummy metal with vias, referred to as dummy vias, for the sole purpose of improving the heat flow vertically downwards toward the heat sinking substrate.
SUMMARY OF THE INVENTION
According to the present invention, disadvantages and problems associated with previous techniques for dissipating heat from a heat generating structure in an integrated circuit may be reduced.
In one embodiment of the present invention, an integrated circuit includes a heat generating structure within a dielectric region. The dielectric region has a top surface and a bottom surface, the bottom surface of the dielectric region coupled to a substrate underlying the dielectric region. The integrated circuit also includes one or more substantially horizontally arranged heat dissipation layers within the dielectric region. Each heat dissipation layer includes a number of electrically inactive thermally conductive structures, at least two electrically inactive thermally conductive structures in at least one heat dissipation layer being substantially horizontally connected and thermally coupled to one another within the at least one heat dissipation layer. The electrically inactive thermally conductive structures operate cooperatively to facilitate dissipation of heat from the heat generating structure.
In a particular embodiment of the present invention, an integrated circuit includes one or more heating generating structures, such as a current carrying metal lead, embedded within a dielectric region of an integrated circuit interconnect layer. The dielectric region typically has at least one of its two surfaces—top and bottom—thermally coupled to an external heat sink by virtue of its packaging details. For example, heat flow may occur through the bottom surface connection to the integrated circuit substrate, although the invention applies to the case where the other or both surfaces are thermally coupled to external heat sinks. The integrated circuit also includes patterned electrically inactive dummy metal structures, which may in known techniques be connected vertically with dummy vias, improving heat flow between metal layers to the heat sinking substrate. In this embodiment, at least two electrically inactive dummy metal structures within a given metallization layer are connected with horizontally disposed metal connections which improve the heat flow horizontally. The horizontal connections between the previously isolated dummy metal structures can occur in either of the two natural orthogonal directions in which metal leads are typically patterned or in any other suitable direction. The horizontal connectivity may occur between many, and not just two, previously isolated dummy metal structures within a given metallization layer of the integrated circuit. In keeping with the physical principles discussed previously, the temperature increase of a heat generating metal lead will monotonically decrease as the degree of horizontal connectivity of all previously isolated dummy metal structures in its vicinity increases.
It may be desirable in certain embodiments to intentionally design in electrically inactive space around regions of high heat generation in order to create thermally optimized dummy metal structures which are both horizontally and vertically connected, thereby enabling minimum temperature rise within the region of high heat generation. One extension of this concept comprehends that the region of high heat generation may be caused by electrically active circuit elements such as transistors and diffused resistors which may be built in proximity to the substrate, rather than being caused by high heat generation in electrically active metal leads. In this case, an “umbrella” of connected dummy metal above this region may help to spread the heat flow to the substrate, resulting in reduced local temperatures. Analogous concepts may be applied, in other embodiments, in connection with dummy metal structures embedded within an integrated circuit package substrate.
In another embodiment of the present invention, an integrated circuit includes one or more heat generating structures within a dielectric region. The dielectric region has a top surface and a bottom surface, the bottom surface of the dielectric region coupled to a substrate underlying the dielectric region. The integrated circuit also includes a number of electrically inactive thermal posts formed at least partially within the dielectric region and exposed on the top surface of the dielectric region. At least one electrically inactive thermal post is substantially horizontally connected and thermally coupled to another electrically inactive thermal post. The electrically inactive thermal posts operate cooperatively to facilitate dissipation of heat from the heat generating structures.
In another particular embodiment of the present invention, an integrated circuit includes one or more heat generating structures within a dielectric region of an integrated circuit interconnect layer. The dielectric region typically has at least one of its two surfaces—top and bottom—thermal
Hunter William R.
Rost Timothy A.
Young Bradley S.
Brady III W. James
Clark Jasmine
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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