Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1992-04-30
1994-02-15
Owens, Terry J.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
427 97, 427 99, 427574, 427579, C23C 1600
Patent
active
052865185
ABSTRACT:
A semiconductor processing method provides for plasma-enhanced chemical-vapor deposition (PECVD) for intermetal dielectrics while minimizing risk of gate oxide impairment due to plasma discharge. A protective oxide sublayer is deposited without using high-power PECVD. The protective sublayer can be deposited by using chemical-vapor deposition (CVD) without plasma enhancement or by a lower-power PECVD. In the latter case, the initial rf power of the plasma is selected to be low enough to ensure that the gate oxide is not breached in the event of a plasma discharge. The protective sublayer can be thick enough to maintain its integrity in the event of a plasma discharge even during a higher-power PECVD deposition.
REFERENCES:
patent: 4587171 (1986-05-01), Hamano
patent: 4690746 (1987-09-01), McInerney
patent: 4762728 (1988-08-01), Keyser
patent: 5069749 (1991-12-01), Gutierrez
Cain John
Fujishiro Felix
Koenigseder Sigmund
Lee Chang-Ou
Vines Landon
Anderson Clifton L.
Dang Vi Duong
Owens Terry J.
VLSI Technology Inc.
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