Integrated circuit processing methods

Details Integrated circuit processing methods Integrated circuit processing methods

1984-04-06

1985-08-20

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156644, 156646, 156652, 156653, 156655, 156656, 1566611, 156668, 204192E, 357 71, 427 89, 430313, 430315, 430317, 430318, B44C 122, C03C 1500, C03C 2506, C23F 102

Patent

active

045362491

ABSTRACT:
An integrated circuit processing method comprises the formation on a substrate of a metallized conductor pattern. A layer of insulating material is formed over the conductor pattern and a mask is superimposed thereon. The mask is resistant to plasma etching and is provided at predetermined positions with apertures defining required void outlines. Plasma etching through the mask forms vias in the insulating layer which communicate with the metallized conductor pattern. The mask is removed to leave the integrated circuit with communicating vias which enable connection to the conductor pattern.

REFERENCES:
patent: 3816196 (1974-06-01), LaCombe
patent: 4070501 (1978-01-01), Corbin et al.
patent: 4184909 (1980-01-01), Chang et al.
patent: 4317700 (1982-03-01), Tanaka et al.
patent: 4367119 (1983-01-01), Logan et al.
patent: 4409319 (1983-10-01), Colacino et al.

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