Integrated circuit process using a "hard mask"

Details Integrated circuit process using a "hard mask" Integrated circuit process using a "hard mask"

1992-12-17

1993-11-23

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156651, 1566591, 156662, 156663, 156904, 437228, 437233, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

052640760

ABSTRACT:
A layer of spin-on-glass is used as a hard mask for patterning an underlying layer of polysilicon. The patterned polysilicon may be used in the gate structures of field effect transistors.

REFERENCES:
patent: 4244799 (1981-01-01), Fraser et al.
patent: 4521274 (1985-06-01), Reichmanis et al.
patent: 4683024 (1987-07-01), Miller et al.
patent: 4935095 (1990-06-01), Lehter
patent: 5100503 (1992-03-01), Allman et al.
Journal of Electrochemical Society: Solid-State Science and Technology, "Contour Modifiers for Optical Lithography," Jul. 1988, by L. K. White, pp. 1844-1846.
Proceedings of the Microlithography Seminar, Interface '90, "Line Width Control over Topography Using Spin-on AR Coating", by Shay Kaplan, pp. 307-314.

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