Integrated circuit planarization by mechanical polishing

Details Integrated circuit planarization by mechanical polishing Integrated circuit planarization by mechanical polishing

1988-08-31

1989-11-07

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437974, 437946, 156626, 156636, 156645, 511311, H01L 21304, H01L 21306

Patent

active

048792586

ABSTRACT:
A process for planarizing the surface of a semiconductor wafer, after the wafer has been processed to form nonplanar topography layers on the blank, polished wafer, by mechanically removing material from this surface by abrasion until a desired planarity is attained. The mechanical planarization prevents step coverage problems encountered in further processing, avoids multiple step prior art planarizing methods, and can be effectively controlled by several simple methods.

REFERENCES:
patent: 3979239 (1976-07-01), Walsh
patent: 4144099 (1979-03-01), Edmonds et al.
patent: 4197676 (1980-04-01), Sauerland
patent: 4244775 (1981-01-01), D'Asaro
patent: 4358338 (1982-11-01), Downey et al.
patent: 4403453 (1983-09-01), Cave et al.
patent: 4419848 (1983-12-01), Dischert
patent: 4462860 (1984-07-01), Szmanda
patent: 4600469 (1986-07-01), Fusco et al.
patent: 4671851 (1987-06-01), Beyer et al.
patent: 4789648 (1988-12-01), Chow et al.
patent: 4793895 (1988-12-01), Kaanta et al.

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