Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2011-08-23
2011-08-23
Chambliss, Alonzo (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C257S692000, C257S773000, C257S786000, C257SE21502, C257SE21505, C257SE23010, C257SE23116, C257SE23141
Reexamination Certificate
active
08003445
ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: providing a carrier; mounting an integrated circuit on the carrier; mounting a z-interconnect on the carrier, the z-interconnect for supporting a trace cantilevered over the integrated circuit; encapsulating the integrated circuit with an encapsulation; removing the carrier; and depositing a substrate below the integrated circuit.
REFERENCES:
patent: 5250843 (1993-10-01), Eichelberger
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5726493 (1998-03-01), Yamashita et al.
patent: 5841193 (1998-11-01), Eichelberger
patent: 6159767 (2000-12-01), Eichelberger
patent: 6309912 (2001-10-01), Chiou et al.
patent: 6356453 (2002-03-01), Juskey et al.
patent: 6495912 (2002-12-01), Huang et al.
patent: 6614104 (2003-09-01), Farnworth et al.
patent: 6847109 (2005-01-01), Shim
patent: 6946325 (2005-09-01), Yean et al.
patent: 6987661 (2006-01-01), Huemoeller et al.
patent: 7018866 (2006-03-01), Sugaya et al.
patent: 7084513 (2006-08-01), Matsuki et al.
patent: 7208345 (2007-04-01), Meyer et al.
patent: 7294587 (2007-11-01), Asahi et al.
patent: 7312405 (2007-12-01), Hsu
patent: 7334326 (2008-02-01), Huemoeller et al.
patent: 7361533 (2008-04-01), Huemoeller et al.
patent: 7429786 (2008-09-01), Karnezos et al.
patent: 7619901 (2009-11-01), Eichelberger et al.
patent: 7675157 (2010-03-01), Liu et al.
patent: 2005/0184377 (2005-08-01), Takeuchi et al.
patent: 2006/0197210 (2006-09-01), Kim
patent: 2008/0029858 (2008-02-01), Merilo et al.
patent: 2008/0157402 (2008-07-01), Ramakrishna et al.
patent: 2009/0315170 (2009-12-01), Shim et al.
patent: 2010/0006994 (2010-01-01), Shim et al.
patent: 2010/0230806 (2010-09-01), Huang et al.
U.S. Appl. No. 12/236,445, filed Sep. 23, 2008, Ha et al.
U.S. Appl. No. 12/411,154, filed Mar. 25, 2009, Huang et al.
Chua Linda Pei Ee
Do Byung Tai
Pagaila Reza Argenty
Chambliss Alonzo
Ishimaru Mikio
Stats Chippac Ltd.
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