Integrated circuit packaging system having asymmetric...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S777000, C257S723000, C257S724000, C438S109000, C438S124000, C438S106000

Reexamination Certificate

active

08063477

ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a first internal integrated circuit structure and a second internal integrated circuit structure over the substrate; connecting the first internal integrated circuit structure and the second internal integrated circuit structure to the substrate with internal interconnects; forming asymmetric encapsulation structures above the first internal integrated circuit structure and the second internal integrated circuit structure; and encapsulating the first internal integrated circuit structure and the internal interconnects with an encapsulation.

REFERENCES:
patent: 6861288 (2005-03-01), Shim et al.
patent: 2008/0227238 (2008-09-01), Ko et al.
patent: 2009/0079081 (2009-03-01), Silverbrook et al.

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