Integrated circuit packaging process and structure

Details Integrated circuit packaging process and structure Integrated circuit packaging process and structure

1988-10-24

1989-09-26

James, Andrew J.

357 70, 357 68, H01L 2348, H01L 2312

Patent

active

048704768

ABSTRACT:
The present invention is a method for packaging and protecting an integrated circuit chip on a carrier tape. A carrier tape comprising at least two bonded layers (one layer being made of an electrically conductive material) includes small flat leads in the conductive layer. A carrier bridge or frame of nonconductive material is bonded to one surface of the leads and is connected to a nonconductive layer (or a part of) the tape. The electrical pads of an integrated circuit are bonded to the respective leads of the tape simultaneously. The leads are cut at a predetermined length from the chip and outside of the frame. The lead ends are bent to form a nest. A planar base is adhered to the surface of the chip having the electrical pads. The leads are then bent over the base to secure the base on the tape and provide electrical contact points to the chip. The chip is coated with a suitable material and to provide insulation and encapsulation of the entire packaging structure. At a desired time, the complete chip packaging structure may be removed from the tape by cutting the frame.

REFERENCES:
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patent: 3698074 (1972-10-01), Helda et al.
patent: 3735214 (1973-05-01), Renskers et al.
patent: 3868724 (1975-02-01), Perrino
patent: 4280132 (1981-07-01), Hayakawa et al.
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patent: 4460825 (1984-07-01), Haghiri-Tehrani et al.
patent: 4549247 (1985-10-01), Hoppe et al.
patent: 4691225 (1987-09-01), Murakami et al.

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