Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1996-09-09
2000-03-28
Williams, Alexander Oscar
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257723, 257 69L, 257690, 257774, 257724, 257758, 257737, 257738, H01L 2348, H01L 2352, H01L 2312
Patent
active
060435593
ABSTRACT:
An integrated circuit package. The package includes a substrate that has a first internal conductive bus and a second internal conductive bus that are located on a common layer of the substrate and dedicated to different power voltage levels. The busses are coupled to external lands located on a first surface of the package by vias that extend through the substrate. The first and second busses are located on a common layer of the substrate. The package contains an integrated circuit which is mounted to a heat slug that is attached to a second surface of the package. The integrated circuit is coupled to bond fingers located on a shelf of the substrate. Some of the bond fingers are connected to the internal busses by conductive strips that wrap around the edges of the shelf. Some of the vias are connected to a whole group of external lands. Grouping the lands to a single via reduces the number of vias on the second surface of the package. The reduction in vias allows additional capacitors to be mounted to the second surface of the package.
REFERENCES:
patent: 3388457 (1968-06-01), Totla
patent: 4608592 (1986-08-01), Miyamoto
patent: 4951098 (1990-08-01), Albergo et al.
patent: 5130889 (1992-07-01), Hamburgen et al.
patent: 5191511 (1993-03-01), Sawayzu
patent: 5235211 (1993-08-01), Hamburgen
patent: 5371403 (1994-12-01), Huang et al.
patent: 5468999 (1995-11-01), Lin et al.
patent: 5473196 (1995-12-01), De Givry
patent: 5490324 (1996-02-01), Newman
patent: 5491362 (1996-02-01), Hamzehdoost et al.
patent: 5497031 (1996-03-01), Kazuno
patent: 5530287 (1996-06-01), Currie et al.
patent: 5548161 (1996-08-01), Hiraud et al.
patent: 5557502 (1996-09-01), Banerjee et al.
patent: 5569955 (1996-10-01), Chillaru et al.
patent: 5591941 (1997-01-01), Acocella et al.
patent: 5604383 (1997-02-01), Motsuzuki
patent: 5608261 (1997-03-01), Bhattacharyya et al.
patent: 5615089 (1997-03-01), Yendea et al.
patent: 5640048 (1997-06-01), Selna
patent: 5652463 (1997-07-01), Weber et al.
patent: 5666004 (1997-09-01), Bhattacharyya et al.
patent: 5672909 (1997-09-01), Glenn et al.
patent: 5672911 (1997-09-01), Patil et al.
patent: 5679977 (1997-10-01), Khondros et al.
patent: 5686764 (1997-11-01), Fulzher
patent: 5689091 (1997-11-01), Hamzehdoost et al.
patent: 5691041 (1997-11-01), Frankeny et al.
patent: 5691568 (1997-11-01), Chou et al.
patent: 5719438 (1998-02-01), Iwosaki et al.
patent: 5724232 (1998-03-01), Bhatt et al.
patent: 5753976 (1998-05-01), Harvey
patent: 5767575 (1998-06-01), Lan et al.
patent: 5796170 (1998-08-01), Moreontonio
patent: 5847936 (1998-12-01), Forehand et al.
Banerjee Koushik
Chroneos, Jr. Robert J.
Mozdzen Tom
Intel Corporation
Williams Alexander Oscar
LandOfFree
Integrated circuit package which contains two in plane voltage b does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit package which contains two in plane voltage b, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit package which contains two in plane voltage b will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1328339