Integrated circuit package system with down-set die pad and...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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Details

C257S623000, C257S676000, C257S782000, C257SE21506, C257SE23031, C257SE23043, C257SE23045, C361S774000, C361S813000

Reexamination Certificate

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07833840

ABSTRACT:
An integrated circuit package system and method of manufacture therefor includes providing a substrate with a beveled cavity, attaching a down-set conductive die pad with tapered sidewalls for matching with the beveled cavity in the substrate and having the down-set below a lower surface of the substrate, and attaching an integrated circuit over the down-set conductive die pad and electrically connected thereto.

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patent: 2003/0206401 (2003-11-01), Zhou

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