Integrated circuit package system including wafer level spacer

Details Integrated circuit package system including wafer level spacer Integrated circuit package system including wafer level spacer

2006-07-11

2011-10-18

Dickey, Thomas L (Department: 2893)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

C257S678000

Reexamination Certificate

active

08039365

ABSTRACT:
An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate.

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Definition of ‘boundary’, “Merriam-Webster's Collegiate Dictionary”, 1994, p. 135, Tenth Edition, Publisher: Merriam-Webster, Incorporated, Published in: Springfield, MA, USA.

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