Integrated circuit package system employing device stacking

Details Integrated circuit package system employing device stacking Integrated circuit package system employing device stacking

2007-06-21

2010-11-09

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C438S110000, C438S119000, C438S114000, C438S462000, C438S109000, C257S678000, C257S728000

Reexamination Certificate

active

07830020

ABSTRACT:
An integrated circuit package system that includes: providing an electrical interconnect system including an inner lead-finger system and an outer lead-finger system; stacking a first device, a second device, and a third device between and over the electrical interconnect system; connecting the first device and the second device to the inner lead-finger system; and connecting the third device to the outer lead-finger system.

REFERENCES:
patent: 6593545 (2003-07-01), Greenwood et al.
patent: 6773961 (2004-08-01), Lee et al.
patent: 7164202 (2007-01-01), Wang et al.
patent: 2004/0251557 (2004-12-01), Kee
patent: 2008/0079130 (2008-04-01), Ha et al.
patent: 2008/0135989 (2008-06-01), Jang et al.

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