Integrated circuit package and method for producing it

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Reexamination Certificate

active

07635642

ABSTRACT:
An integrated circuit includes a first integrated circuit flip chip (105, 205, 305) is bonded to first electric contacts (102, 202, 302) which are an inner part (104, 204, 304) of a planar array (103, 203, 303) of electric contacts. Second electric contacts (106, 206, 306) on the flip chip are in register with the first electric contacts (102, 202, 302) of this inner part of the array. A second integrated circuit (108, 208, 308) is mounted on the face of the flip chip (105, 205, 305) opposite the array. The second integrated circuit (108, 208, 308) has third electric contacts (109, 209, 309) facing away from the flip chip (105, 205, 305). Wire bonds (112, 212, 312) are formed between the third electric contacts of the second integrated circuit (108, 208, 308) and others of the array of first electric contacts (102, 202, 302). The first and second integrated circuits are sealed in a resin body (110, 210, 310). The first electric contacts are ends of electrical paths extending perpendicular to the faces of the integrated circuit to a corresponding array of contacts on the lower surface of the package.

REFERENCES:
patent: 4720324 (1988-01-01), Hayward
patent: 5783870 (1998-07-01), Mostafazadeh et al.
patent: 6258626 (2001-07-01), Wang et al.
patent: 6329711 (2001-12-01), Kawahara et al.
patent: 6713854 (2004-03-01), Kledzik et al.
patent: 0 915 505 (1999-05-01), None
patent: 0 977 259 (2000-02-01), None
patent: 1 045 443 (2000-10-01), None
patent: 1 122 778 (2001-08-01), None

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