Integrated circuit package and manufacturing method therefor...

Details Integrated circuit package and manufacturing method therefor... Integrated circuit package and manufacturing method therefor...

2005-02-15

2005-02-15

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S108000, C438S113000, C438S109000, C438S110000, C438S615000, C257S738000, C361S782000, C361S760000

Reexamination Certificate

active

06855573

ABSTRACT:
An integrated circuit package, and manufacturing method therefor, is provided. A substrate is provided having solder openings therein and a conductive layer thereon. The conductive layer is processed to form a plurality of pads over the solder openings in the substrate. A mask is formed over the plurality of pads and openings formed in the mask over at least two pads of the plurality of pads. An integrated circuit die is bonded over the substrate using a conductive adhesive where the conductive adhesive is placed in the openings in conductive contact with at least two pads of the plurality of pads.

REFERENCES:
patent: 6160312 (2000-12-01), Raad
patent: 6284566 (2001-09-01), Lee et al.
patent: 6396707 (2002-05-01), Huang et al.
patent: 6611199 (2003-08-01), Geiszler et al.
patent: 20040190273 (2004-09-01), Chen et al.

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