Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2009-05-14
2010-10-05
Hoang, Quoc D (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257SE21551
Reexamination Certificate
active
07807501
ABSTRACT:
An integrated circuit package is disclosed. The integrated circuit package comprises an integrated circuit die having a plurality of solder bumps; and a substrate comprising a first plurality of contact pads on a first surface and a second plurality of contact pads on a second surface. The plurality of solder bumps on the integrated circuit die is coupled to the first plurality of contact pads on the first surface of the substrate, wherein at least one edge of the substrate is formed after the integrated circuit die is attached to the substrate. According to one embodiment of the invention, the at least one edge of the substrate is formed after excess substrate material is detached at designated areas. According to another aspect of the invention, an assembly fixture is disclosed. An apparatus and method for assembling an integrated circuit package are also disclosed.
REFERENCES:
patent: 7078800 (2006-07-01), Kwon et al.
patent: 7187123 (2007-03-01), MacPherson
patent: 2007/0018539 (2007-01-01), Nagashima
U.S. Appl. No. 11/250,945, filed Oct. 14, 2005, Zhang, L., Xilinx, Inc., 2100 Logic Drive, San Jose, California.
Hoang Quoc D
King John J.
Xilinx , Inc.
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