Integrated circuit package alignment feature

Details Integrated circuit package alignment feature Integrated circuit package alignment feature

1997-09-15

2000-04-11

Niebling, John F.

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438112, 438127, G01R 3126, H01L 2166, H01L 2144, H01L 2148, H01L 2150

Patent

active

060487445

ABSTRACT:
An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semi-circle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

REFERENCES:
patent: 3678385 (1972-07-01), Bruner
patent: 5766978 (1998-06-01), Johnson

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