Integrated circuit package

Details Integrated circuit package Integrated circuit package

1998-01-16

2001-12-11

Reichard, Dean A. (Department: 2831)

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

C257S693000

Reexamination Certificate

active

06329594

ABSTRACT:

This invention relates to packaging for an integrated circuit and more particularly to high density circuitry for integrated circuit packages.
BACKGROUND OF THE INVENTION
The evolution of electronic circuitry as used in data processing equipment is toward ever increasing computer performance and ever greater miniaturization. At the integrated circuit module level, this evolution manifests itself in the form of smaller integrated circuit packages with a greater number of input/output leads. Thus, a higher density of input/output leads is needed without compromising the effectiveness of the circuit assembly process or the testing methodology.
The state of the art packaging of integrated circuit modules is represented by the flat pack module which consists of a ceramic or plastic casing body containing the silicon device in the shape of a square in plan view and which has a large number of leads attached to the four edges of the package. The number of leads required for the individual device and how close together the leads can be placed are generally determining factors in the sizes of the modules. With current advanced assembly techniques, the lead pitch of the state of the art for a four-sided quad flat packs has reached a practical limit of 0.015 inches. With modern integrated circuit devices requiring upwards of 300 IO leads, this lead pitch makes the integrated circuit package a determining factor in the overall circuit packaging density. The standard quad flat pack has a surface mounting board employing rigid leads, but with rigid leads, the lead pitch is typically not less than 0.025 inches. As an alternative to the use of rigid leads, wirebonds can be employed for the connecting circuitry. Wirebonds permit significant increases in the IO lead density, but the smaller conductors of the wirebonds are prone to damage and have less than optimum electrical performance.
SUMMARY OF THE INVENTION
The present invention provides another approach for providing the connecting IO leads and increases the density of the leads without sacrificing the electrical performance of the circuit package and also provides a package which can be readily manufactured and can be readily tested. In accordance with the invention, the interconnecting leads are provided by means of flexible circuitry, which comprises a flexible insulating film layer on one side of which the IO leads are formed by a photoetching process and on the other side of which is a conducting sheet or film providing a ground reference for the IO leads. By providing I/O leads with this structure, the lead spacing well below 0.010 inches can be achieved. The flexible circuitry connects directly by solder connections to contact pads which connect directly to circuit points in the integrated circuit. By using the flexible circuitry to make the connection to the contact pads, the size of the integrated circuit package as measured by its surface area or footprint is reduced by over a factor of 2.


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