Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Patent
1998-11-13
2000-07-18
Santamauro, Jon
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
326 83, 326 57, H03K 1716
Patent
active
06091260&
ABSTRACT:
Integrated circuit output buffers include first and second pull-down switches and a preferred pull-down control circuit which utilizes a preferred feedback technique to facilitate a reduction in simultaneous-switching noise during pull-down operations and also improve the impedance matching characteristics of the output buffers during DC conditions. The preferred feedback technique also limits the degree to which external noise can influence operation of the pull-down control circuit. First and second pull-up switches and a pull-up control circuit are also provided to improve simultaneous-switching noise and impedance matching characteristics during pull-up operations in a similar manner. The first and second pulldown switches are electrically connected in parallel between an output of the buffer and a first reference signal line (e.g., Vss) and the first and second pull-up switches are electrically connected in parallel between an output of the buffer and a second reference signal line (e.g., Vdd). The pull-down and pull-up switches may comprise NMOS and PMOS transistors, respectively.
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Integrated Device Technology Inc.
Le Don Pho
Santamauro Jon
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