Electronic digital logic circuitry – Superconductor
Reexamination Certificate
2002-07-25
2004-03-09
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Superconductor
C326S003000, C326S006000, C326S007000
Reexamination Certificate
active
06703857
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to an integrated circuit of superconducting devices and, more particularly, to an integrated circuit consisting of plural superconducting circuit blocks and a method for designing the integrated circuit.
DESCRIPTION OF THE RELATED ART
An integrated superconducting logic circuit comprises plural superconducting circuit blocks and superconducting wiring strips selectively connected between the superconducting circuit blocks. The superconducting circuit blocks carry out basic logical operations on input signals, and the output signals are propagated through the superconducting wiring strips. A circuit configuration of the simple rapid single flux quantum logic gates, i.e., RSFQ logic circuits and a connection between the superconducting circuits are disclosed by K. K. Kikharev et. al. in “RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz- Clock- Frequency Digital Systems”, IEEE Transactions on Applied Superconductivity, vol. 1, No. 1, pages 3 to 28, March 1991.
FIGS. 1A
to
1
C illustrate the current flowing in the prior art superconducting circuit blocks. In
FIGS. 1A and 1B
, superconducting circuit blocks
91
and
92
are connected to each other through a superconducting wiring strip
93
, and the superconducting circuit blocks
95
and
96
are connected to each other through a superconducting wiring strip
97
. The superconducting circuit block
91
is same in circuit configuration as the superconducting circuit block
95
, and achieves a certain logic operation on input signals. The superconducting circuit block
92
is different in circuit configuration from the superconducting circuit block
96
. However, it is not a problem that the superconducting circuit block
92
is same in circuit configuration as the superconducting circuit block
96
.
When the superconducting circuit block
92
achieves the task, the superconducting circuit block
92
outputs static current
94
through the superconducting wiring strip
93
to the superconducting circuit block
91
. This results in that the superconducting circuit block
91
is statically with the current more than the current flowing through the superconducting circuit block
91
in the isolated state due to the connection to the superconducting circuit block
92
.
Similarly, the superconducting circuit block
95
supplies static current
98
through the superconducting wiring strip
97
to the superconducting circuit block
96
. Accordingly, the superconducting circuit block
95
is statically supplied with current less than the current flowing through the superconducting circuit block
95
in the isolated state.
FIG. 1C
illustrates the amount of current supplied to each of the superconducting circuit blocks
91
and
95
. When the superconducting circuit blocks
91
/
95
are isolated, the operating range is represented by a block A. In order to give the maximum margin to the superconducting circuit blocks
91
/
95
, the superconducting circuit blocks
91
/
95
are designed to have the amount of supply current at mid point A
1
of the operating range A. When the superconducting circuit block
92
is connected to the superconducting circuit block
91
, the amount of supply current is increased as described hereinbefore, and is moved to point A
2
. On the other hand, when the superconducting circuit block
95
is connected to the superconducting circuit block
96
, the amount of current is decreased, and is moved to point A
3
.
Although point A
2
is within the operating range, the margin is reduced. When the supply current is moved to point A
3
, which is out of the operating range A, the superconducting circuit block
95
becomes inoperative. The amount of supply current is regulable by changing design parameters of the superconducting circuit blocks. In order words, the supply current to each of the superconducting circuit blocks connected to one another is optimized at the mid point A
1
by changing the design parameters for each superconducting circuit block. However, a large amount of time and labor is consumed in the optimization. Even though the superconducting circuit blocks such as those labeled with
91
and
95
are identical in circuit configuration with one another, the optimum set of design parameters is different between the superconducting circuit blocks
91
and
95
, because the quantity and direction are different between the static current
94
and the static current
98
. If a few superconducting circuit blocks form in combination an integrated circuit, the optimization will be not complicated. However, in case where a large number of superconducting circuit blocks are integrated into a complicated circuit, the optimization is a hard work.
Clark A. Hamilton et. al. report the optimization of parameters for the superconducting circuit blocks of a large scale integration to be difficult (see “Margins and Yield in Single Flux Quantum Logic”, IEEE Transactions on Applied Superconductivity, Vol. 1, No. 4, pages 157 to 163, December 1991). Thus, the prior art integrated circuit of the superconducting circuit blocks has a problem in that the optimization is difficult due to a large number of parameters to be considered in the optimization of the supply current.
This problem is inherent in the superconducting circuit, because it is difficult to separate an input signal from an output signal. On the contrary, input signals are separated from output signals in semiconductor large-scale integrated circuits, and the optimization work is not required for the semiconductor large-scale integrated circuits.
SUMMARY OF THE INVENTION
It is therefore an important object of the present invention to provide an integrated circuit of superconducting circuit blocks in which the amount of supply current to each superconducting circuit block is approximately equal to zero without changing parameters of the superconducting circuit block.
It is also an important object of the present invention to provide a method of designing an integrated circuit of the superconducting circuit blocks.
In accordance with one aspect of the present invention, there is provided a integrated circuit comprising a first superconducting circuit block including an output node, a first superconducting circuit for a certain function and a constant output circuit connected between an output node of the first superconducting circuit and the output node and making the amount of statically flow-in or flow-out current at an output node of the first superconducting circuit approximately equal to zero, and a second superconducting circuit block including an input node, a second superconducting circuit for a certain function and a constant input circuit connected between the input node and an input node of the second superconducting circuit and making the amount of statically flow-in or flow-out current at the input node of the second superconducting circuit approximately equal to zero.
By virtue of the constant output circuit and constant input circuit, the amount of statically flow-in and/or flow-out current is approximately equal to zero so that the superconducting circuit blocks are simply integrated without changing parameters of the superconducting circuits.
In accordance with another aspect of the present invention, there is provided a method of designing an integrated circuit of superconducting circuit blocks comprising the steps of a) determining a first superconducting circuit block having a constant output circuit, a second superconducting circuit block having a constant input circuit, an output current evaluation circuit and an input current evaluation circuit, b) determining parameters of the output current evaluation circuit and parameters of the input current evaluation circuit in such a manner that the amount of current is approximately equal to zero at an output node of the output current evaluation circuit connected to an input node of the input current evaluation circuit, c) separating the output current evaluation circuit from the input current evaluation circuit, d) conne
Kameda Yoshio
Yorozu Shin-ichi
NEC Corporation
Tan Vibol
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