Integrated circuit MOS transistor with reduced drain and...

Details Integrated circuit MOS transistor with reduced drain and... Integrated circuit MOS transistor with reduced drain and...

2005-07-19

2005-07-19

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S384000

Reexamination Certificate

active

06919605

ABSTRACT:
A gate structure (30) is formed on a semiconductor (10). Source and drain extension regions (130) are formed in the semiconductor (10) adjacent to the gate structure (30). Metal silicide layers (140) are formed on the extension regions (130) and sidewall structures (155, 165, and175) are formed over the metal silicide layers (140). Source and drain regions (120) are formed in the semiconductor (10), and metal silicide layers (180) are formed on the source and drain regions (120).

REFERENCES:
patent: 5747852 (1998-05-01), Chang et al.
patent: 6630721 (2003-10-01), Ligon

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