Integrated circuit memory with write assist

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S156000

Reexamination Certificate

active

07324368

ABSTRACT:
An integrated circuit memory includes memory cells2is connected to a power supply Vdd via a power supply control circuit4. The power supply control circuit includes a first gate26and a second gate28. The first gate26is switched by a write assist circuit so as to be non-conductive when writing to the memory cell2. The second gate28is conductive both when writing to the memory cell2and when not writing to the memory cell2. Accordingly, when a write operation is made a relatively high resistance path is formed through the power supply control circuit4compared to when writing is not being performed. This increase in the resistance through the power supply control circuit4during write operations induces a dip in the virtual supply voltage provided at the supply output of the power supply control circuit4in a manner which assist writes to be made. If individual memory cells2tend to resist changes in their state more strongly, then they will tend to draw more current which will in turn result in a larger virtual supply voltage dip which will assist more strongly in encouraging those memory cells2to change state.

REFERENCES:
patent: 5267197 (1993-11-01), McClure
patent: 5764564 (1998-06-01), Frake et al.
patent: 6788566 (2004-09-01), Bhavnagarwala et al.
patent: 6804143 (2004-10-01), Hobson
Zhang et al., “A 3-GHz 70Mb SRAM in 65nm CMOS Technology with Integrated Column-Based Dynamic Power Supply”, 2005 IEEE International Solid-State Circuits Conference, Session 26, Non-Volatile Memory, 26.1, pp. 474-475, 611, Feb. 9, 2005.
Yamaoka et al., “Low Power Embedded SRAM Modules with Expanded Margins for Writing”, 2005 IEEE International Solid-State Circuits Conference, Session 26, Static Memory, 26.4, pp. 480-481, 611, Feb. 9, 2005.

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