Integrated circuit memory systems having write-back buffers...

Details Integrated circuit memory systems having write-back buffers... Integrated circuit memory systems having write-back buffers...

2007-09-26

2010-06-15

Verbrugge, Kevin (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S105000

Reexamination Certificate

active

07739460

ABSTRACT:
An integrated circuit memory system includes a write-back buffer and a control circuit that support read-write-modify (RWM) operations within a high capacity memory device. A RWM operation may include reading from the integrated circuit memory device and the write-back buffer to identify whether the memory device or the write-back buffer has the data requested by a read instruction issued to the memory system. The data read from the write-back buffer is then written into the memory device and a modified version of the requested data is written to the write-back buffer in anticipation of subsequent transfer to the memory device.

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Shah et al., “Analysis of a Statistics Counter Architecture,” http://tiny-tera.Stanford.edu/˜nickm/papers/hoti2001.pdf, undated.
Ramabhadran et al., “Efficient Implementation of a Statistics Counter Architecture,” SIGMETRICS'03, Jun. 10-14, 2003, San Diego, CA, http://www-cse.ucsd.edu/˜varghese/PAPERS/srirampaper.pdf.

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