Integrated circuit memory devices including banks of memory bloc

Static information storage and retrieval – Addressing – Multiplexing

Patent

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Details

36518901, 36523001, G11C 1300

Patent

active

057012717

ABSTRACT:
An integrated circuit memory device includes a plurality of memory banks. Each of the memory banks includes a first array of at least four memory blocks and a second array of at least four memory blocks wherein each of the memory blocks includes at least two bit lines. Each of the memory blocks from the second array is paired with a respective memory block from the first array and the memory blocks are activated as pairs with at least one pair being activated during a data access operation. Four data lines are provided adjacent the first and second arrays of memory blocks. A plurality of input/output lines directly connects two of the bit lines from each of the memory blocks with two of the input/output lines so that for any pair of the memory blocks, two bit lines from each memory block of the pair are connected to separate data lines.

REFERENCES:
patent: 4658377 (1987-04-01), McElroy

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