Integrated circuit memory devices having reduced power consumpti

Details Integrated circuit memory devices having reduced power consumpti Integrated circuit memory devices having reduced power consumpti

1998-11-06

2000-05-02

Mai, Son

Static information storage and retrieval

Powering

Conservation of power

365233, G11C 700

Patent

active

060580631

ABSTRACT:
Integrated circuit memory devices (e.g., SDRAM) include an input buffer and a power reduction control circuit which disables the input buffer in response to an inactive chip select signal (CSB). The input buffer comprises a first differential amplifier having a first input electrically coupled to an input signal line (PX) and a first pull-up transistor electrically connected in series between a pull-up reference node of the first differential amplifier and a power supply signal line (e.g., Vcc). The output of the power reduction control circuit is electrically connected to a gate electrode of the first pull-up transistor. The first pull-up transistor can be turned off in response to an inactive chip select signal (CSB=1), to thereby electrically disconnect the first differential amplifier from its power supply. The input buffer may also comprise a first pull-down transistor electrically connected in series between an output of the first differential amplifier and a reference potential signal line (e.g., GND) and the output of the power reduction control circuit is electrically connected to a gate electrode of the first pull-down transistor.

REFERENCES:
patent: 4387449 (1983-06-01), Masuda
patent: 4718043 (1988-01-01), Akatsuka
patent: 5526506 (1996-06-01), Hyatt
patent: 5583457 (1996-12-01), Horiguchi et al.
patent: 5602999 (1997-02-01), Hyatt
patent: 5603009 (1997-02-01), Konishi et al.
patent: 5614847 (1997-03-01), Kawahara et al.
patent: 5623453 (1997-04-01), Shinozaki
patent: 5646902 (1997-07-01), Park
patent: 5663919 (1997-09-01), Shirley et al.
patent: 5696729 (1997-12-01), Kitamura
patent: 5708622 (1998-01-01), Ohtani et al.
patent: 5721860 (1998-02-01), Stolt et al.
patent: 5926434 (1999-07-01), Mori
patent: 5926435 (1999-07-01), Park et al.

Affiliated with

Also associated with

Rating

Integrated circuit memory devices having reduced power consumpti does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit memory devices having reduced power consumpti, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit memory devices having reduced power consumpti will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1599214