Integrated circuit memory devices having interleaved read capabi

Details Integrated circuit memory devices having interleaved read capabi Integrated circuit memory devices having interleaved read capabi

1996-09-27

1998-06-16

Hoang, Huan

Static information storage and retrieval

Addressing

Byte or page addressing

36518512, 36518905, 365239, G11C 800

Patent

active

057682151

ABSTRACT:
Integrated circuit memory devices having interleaved read capability include read controllers and subpage data buffers for performing interleaved read operations. These read operations are performed by downloading respective subpages of memory while simultaneously serially transmitting previously downloaded subpages of memory so that consecutive pages of memory data can be serially transmitted as a continuous string of data without the occurrence of breaks therebetween caused by stand-by holding periods. These memory devices typically contain an array of memory cells arranged as a plurality of pages (e.g., rows) of predetermined width coupled to a respective plurality of word lines and a plurality of columns of memory cells electrically coupled to a respective plurality of bit lines. First and second subpage buffers may also be provided for temporarily storing subpages of data read from addressed subpages of memory cells. The read controller is also provided for initiating transfer of a previously read subpage of data from one of the first or second subpage buffers to an I/O data buffer, while simultaneously initiating an interleaved page read operation to read another subpage of data from memory into the other of the first or second subpage buffers. The interleaved page read operation is preferably performed to prevent the occurrence of breaks in the transfer of data to the I/O data buffer when multiple pages of data are being downloaded and serially transmitted to external the memory device.

REFERENCES:
patent: 5231603 (1993-07-01), Luhramann
patent: 5297029 (1994-03-01), Nakai et al.
patent: 5327395 (1994-07-01), Sugiura et al.
patent: 5473563 (1995-12-01), Suh et al.
patent: 5541879 (1996-07-01), Suh et al.
patent: 5546341 (1996-08-01), Suh et al.
patent: 5625590 (1997-04-01), Choi et al.
patent: 5671178 (1997-09-01), Park et al.
Betty Prince et al., Semiconductor Memories, A Handbook of Design, Manufacture and Application, Second Edition, John Wiley & Sons Ltd., pp. 185-187 and 603-604, 1991.

Affiliated with

Also associated with

Rating

Integrated circuit memory devices having interleaved read capabi does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit memory devices having interleaved read capabi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit memory devices having interleaved read capabi will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1734270