Integrated circuit memory devices and methods of programming...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180, C365S185330

Reexamination Certificate

active

06927999

ABSTRACT:
An integrated circuit memory device includes a source line and a memory cell array that includes n memory cells that are connected to the source line. The n memory cells are operative to draw current from the source line in response to an n bit data word. A dummy memory cell circuit is operative to draw current from the source line responsive to the n bit data word such that a total current drawn by the memory cell array and the dummy memory cell circuit during a program operation is given by n*a current drawn by one of the n memory cells.

REFERENCES:
patent: 6785163 (2004-08-01), Yeh et al.

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